CVE-2026-23554

The Intel EPT paging code uses an optimization to defer flushing of any cached EPT state until the p2m lock is dropped, so that multiple modifications done under the same locked region only issue a single flush. Freeing of paging structures however is not deferred until the flushing is done, and can result in freed pages transiently being present in cached state. Such stale entries can point to memory ranges not owned by the guest, thus allowing access to unintended memory regions.

The following products are affected by CVE-2026-23554 vulnerability.

Here, you will find a curated list of external links that provide in-depth information to CVE-2026-23554.

URL	Resource
http://www.openwall.com/lists/oss-security/2026/03/17/6
http://xenbits.xen.org/xsa/advisory-480.html
https://xenbits.xenproject.org/xsa/advisory-480.html